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  AON7200 30v n-channel mosfet general description product summary v ds i d (at v gs =10v) 40a r ds(on) (at v gs =10v) < 8m w r ds(on) (at v gs = 4.5v) < 11m w 100% uis tested 100% r g tested symbol v ds the AON7200 uses trench mosfet technology that is uniquely optimized to provide the most efficient hi gh frequency switching performance. conduction and switching losses are minimized due to an extremely low combination of r ds(on) and crss. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 30v drain-source voltage 30 g d s top view 12 3 4 87 6 5 dfn 3x3 ep top view bottom view pin 1 v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.6 75 2 power dissipation b p d w power dissipation a p dsm w t a =70c 62 2 t a =25c a t a =25c i dsm a t a =70c i d 40 31 t c =25c t c =100c repetitive avalanche energy l=0.1mh c mj avalanche current c 12.7 continuous drain current 39 15.8 a 28 v v 20 gate-source voltage drain-source voltage 30 units junction and storage temperature range -55 to 150 c thermal characteristics maximum junction-to-ambient a c/w r q ja 30 60 40 146 pulsed drain current c continuous drain current g parameter typ max t c =25c 3.1 25 t c =100c rev 5: jul 2011 www.aosmd.com page 1 of 6
AON7200 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.85 2.4 v i d(on) 146 a 6.7 8 t j =125c 9.2 11 9 11 m w g fs 60 s v sd 0.7 1 v i s 30 a c iss 870 1090 1300 pf c oss 340 490 640 pf c rss 22 38 53 pf r g 0.4 0.9 1.4 w q g (10v) 12 16 20 nc q g (4.5v) 5 7 9 nc q gs 2 2.5 3 nc q gd 1.5 2.5 3.5 nc t d(on) 5 ns t 2 ns drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =20a reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current forward transconductance diode forward voltage r ds(on) static drain-source on-resistance m w i s =1a,v gs =0v v ds =5v, i d =20a v gs =4.5v, i d =15a v =10v, v =15v, r =0.75 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =15v, i d =20a gate source charge gate drain charge total gate charge maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time t r 2 ns t d(off) 16 ns t f 2 ns t rr 10 13 16 ns q rr 20 25 30 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time i f =20a, di/dt=500a/ m s v gs =10v, v ds =15v, r l =0.75 w , r gen =3 w turn-off fall time body diode reverse recovery charge i f =20a, di/dt=500a/ m s turn-on rise time turn-off delaytime a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s value and the maximum allowed junction tempera ture of 150 c. the value in any given application depends on the user's specific board de sign. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by bond-wi res. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 5: jul 2011 www.aosmd.com page 2 of 6
AON7200 typical electrical and thermal characteristics 0 18 0 10 20 30 40 50 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 3 6 9 12 15 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 3.5v 4.5v 10v 4v 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =15a v gs =10v i d =20a 40 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0 5 10 15 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =20a 25 c 125 c (note e) rev 5: jul 2011 www.aosmd.com page 3 of 6
AON7200 typical electrical and thermal characteristics 0 2 4 6 8 10 0 3 6 9 12 15 18 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 1400 1600 1800 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 100 200 300 400 500 0.00001 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- c oss c rss v ds =15v i d =20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe 100 m s dc r ds(on) t j(max) =150 c t c =25 c 1ms 1s 10 m s case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse operating area (note f) r q jc =2 c/w rev 5: jul 2011 www.aosmd.com page 4 of 6
AON7200 typical electrical and thermal characteristics 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de - rating (note f) t a =25 c 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note h) r q ja =75 c/w rev 5: jul 2011 www.aosmd.com page 5 of 6
AON7200 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr rev 5: jul 2011 www.aosmd.com page 6 of 6


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